[Pd] Latency with 0.39-2

[_ at whats-your.name]

> and be sure to check the buffer settings. any hardware made in the last 5 years will work with 256 samples (and perhaps 128) with ASIO..

if you cant get 256 sample latency with ASIO, i'd file a bug. and maybe in the bug suggest the native implementation of ASIO from devel_pd as an existing solution. (since debugging the PA<>ASIO implemenetation would take about as much time as merging it)

the total latency should be a bit more, (256 samples for ASIO + 64 for pd's internal blocksize) / 44100 and maybe a ms or so for the DA. so around 8 ms. which shuld be acceptable unless youre a scientist.. in which case you can use the RT kernel, set the ALSA/jack buffer to 32 samples, and run pd-devel with the cb-scheduler..

> _______________________________________________
> PD-list at iem.at mailing list
> UNSUBSCRIBE and account-management -> http://lists.puredata.info/listinfo/pd-list
>