[PD-dev] About inlet DSP prolog.

Nicolas Danet nicolas.danet at free.fr
Wed Feb 14 07:49:19 CET 2018


Hi,

< https://github.com/pure-data/pure-data/blob/master/src/g_io.c#L210 >

x->x_fill = x->x_endbuf - (x->x_hop - prologphase * re_parentvecsize);

< g.io.c / line 210 >

IMHO it does not properly shift the buffer in case of overlap (i.g. [block~ 512 4]) if stopping/restarting the DSP.

x->x_fill = prologphase ? x->x_endbuf - (x->x_hop - prologphase * re_parentvecsize) : x->x_endbuf;

The change above might solve the problem.

I'm not 100 % sure. I'm currently testing the fix on Spaghettis < https://github.com/Spaghettis/Spaghettis/compare/dev >.



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