[PD] phasor~ and osc~ right inlet: exact timing

Matteo Sisti Sette matteosistisette at gmail.com
Fri Apr 16 18:12:37 CEST 2010


ypatios escribió:
> what if a timer between bang and vsnapshot's reaction shows 0?
> 

I'm not sure whether this proves or disproves the one-block-delay 
hypothesis. Experts of the insides of how Pd's data/dsp processing loop 
works can certainly answer on that - and I'm very curious too


-- 
Matteo Sisti Sette
matteosistisette at gmail.com
http://www.matteosistisette.com




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