[PD] audio rate shift register abstraction with Pd vanilla

[Roman Haefeli]

On Tue, 2022-02-22 at 17:08 -0500, Samuel Burt wrote:
> 
>    Is there some kind of delay introduced by [delwrite~] [delread~]
> even when the delay is set to 0ms? 

Yes. 0 delay can only be achieved if the [delwrite~] is ordered before
the [delread~] in the DSP graph. In your case, since you send your
signal "upstream", the [delrwite~] is certain to be executed _after_
[delread~ ] and this adds a latency of one block (64 samples, if not
re-blocked).

Roman
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